Abstract
System-on-Chips (SoC) have imposed new yet stringent design specifications on the Radio Frequency (RF) subsystems. The Timed Data Flow (TDF) model of computation available in SystemC-AMS offers here a good trade-off between accuracy and simulation-speed at the system-level. However, one of the main challenges in system-level verification is the availability of reference models traditionally used to verify the correctness of the Design Under Verification (DUV).
Recently, Metamorphic testing (MT) introduced a new verification perspective in the software domain to alleviate this problem. MT uncovers bugs just by using and relating test-cases.
In this paper, we present a novel MT-based verification approach to verify the linear and non-linear behaviors of RF amplifiers at the system-level. The central element of our MT-approach is a set of Metamorphic Relations (MRs) which describes the relation of the inputs and outputs of consecutive DUV executions. For the class of Low Noise Amplifiers (LNAs) we identify 12 high-quality MRs. We demonstrate the effectiveness of our proposed MT-based
verification approach in an extensive set of experiments on an industrial system-level LNA model without the need of a reference model.
| Original language | English |
|---|---|
| Title of host publication | 26th Asia and South Pacific Design Automation Conference (ASP-DAC) |
| Number of pages | 6 |
| Publication status | Published - 2021 |
Fields of science
- 202005 Computer architecture
- 202017 Embedded systems
- 102 Computer Sciences
- 102005 Computer aided design (CAD)
- 102011 Formal languages
JKU Focus areas
- Digital Transformation
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