Abstract
Formal verification of integer multipliers is one of the important but challenging problems in the verification community. Recently, the methods based on Symbolic Computer Algebra (SCA) have shown very good results in comparison to all other existing proof techniques. However, when it comes to verification of huge and structurally complex multipliers they completely fail as an explosion happens in the number of monomials. The reason for this explosion is the generation of redundant monomials known as vanishing monomials. This paper introduces the SCA-based approach that combines reverse engineering and local vanishing removal to verify large and non-trivial multipliers. For our approach, we first come up with a theory for the origin of vanishing monomials, i.e. we prove that the gates/nodes where both outputs of Half Adders (HAs) converge are the origins of vanishing monomials. Then, we propose a dedicated reverse engineering technique to identify atomic blocks including HAs. The identified HAs are the basis for detecting converging cones and locally removing vanishing monomials which finally results in a vanishing-free global backward rewriting. The efficiency of is demonstrated using an extensive set of multipliers with up to several million gates.
| Original language | English |
|---|---|
| Pages (from-to) | 1573-1586 |
| Number of pages | 14 |
| Journal | IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) |
| Volume | 41 |
| Issue number | 5 |
| DOIs | |
| Publication status | Published - May 2021 |
Fields of science
- 202005 Computer architecture
- 202017 Embedded systems
- 102 Computer Sciences
- 102005 Computer aided design (CAD)
- 102011 Formal languages
JKU Focus areas
- Digital Transformation