Abstract
A key issue in proceeding the digitization of Phase-Locked Loops (PLLs) is the realization of proper phase detectors in the digital domain. This paper presents simulative analysis of the properties and requirements for Time-to-Digital Converters (TDCs) used for phase comparison in digitized fractional-N modulators with two-point modulation. Effects due to quantization of the TDC on frequency synthesis as well as GSM modulation quality are considered, defining the realization requirements for a transmitter.
| Original language | English |
|---|---|
| Title of host publication | Proc. of International Microwave Symposium (IMS 2006) |
| Number of pages | 4 |
| Publication status | Published - 2006 |
Fields of science
- 202019 High frequency engineering
- 202028 Microelectronics
- 202030 Communication engineering
- 202 Electrical Engineering, Electronics, Information Engineering
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