Recent Developments in Bandgap References for Nanometer CMOS Technologies

This paper provides a short overview about evolving sub-bandgap references, and the related challenges in modern FinFET nodes. Specifically, we present a simple yet innovative concept to generate PTAT and CTAT voltages through “capacitive bias”: In replacement of the classical BJT, the active bulk diode is utilized and forward biased by a charge-pump. Two capacitors are discharged across the diode for different time periods, which precisely defines the respective current densities. The sampled diode voltages are then combined by charge sharing or addition, to provide a robust reference. A reverse bandgap reference using this architecture features an untrimmed accuracy of ± 0.73% (3σ), consuming only 21nA in a 16nm FinFET process. The simple structures feature intrinsic supply rejection down to 0.85V and a digital-alike operation.