Quality Assessment of Generated Hardware Designs Using Statistical Analysis and Machine Learning

In order to continuously increase design productivity, engineers and researchers rely on automation frameworks for hardware design purposes. This does not only guarantee an easier implementation of components, but creates a larger margin for improvement by generating design variants. Within this framework, a major problem for optimizing the generated design is retrieving data from which a prediction function (e.g. area, speed, power consumption) could be learned correctly (since a complete generation, i.e. synthesis of the hardware design, is too computationally expensive to be performed for a wide set of variants). In particular, the data used for learning the prediction function should be representative of valid design possibilities and be generated in an efficient way. As one contribution, this paper describes how Statis- tical Analysis (SA) and Machine Learning (ML) are used to guarantee the quality of the data. At the same time, its retrieval should avoid time consumption and manual effort. Therefore, this paper also proposes an automatic approach to generate representative and valid configuration samples both to improve the efficiency and to avoid manual effort during the retrieval. To point out this concept, we implement the generation of data for the estimation of the area of a Register Interface (RI) component. The proposed methods, implemented through SA and ML, allow to supervise the correctness of the generated data and the learning process itself. As a consequence, given the correctly generated data, the process of learning the RI area through a data-driven ML algorithm guarantees a still accurate (R² = 0:98) but 600x faster estimation.