Abstract
The phase and frequency comparator (PFD) has a counter module (MC) that has an output (41) for transmitting a counter word (CW) having predetermined word width based on an oscillator signal (OSC). An integrator module (MI) has an output (42) for transmitting an integrator word (IW) with a predetermined word width as an integration function of a channel word (CH). A differential unit (S1) has an output (32a) for transmitting a phase error word (PW) with predetermined word width as a function of the difference between the counter word and integrator word. Independent claims are also included for the following: (1) Phase and frequency detection; (2) Oscillator signal generation process; and (3) Use of the phase and frequency detector.
| Translated title of the contribution | Phase and frequency comparator used in digital phase-locked loop (PLL), has differential unit that has output for transmitting phase error word with predetermined word width as function of difference between counter word and integrator word |
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| Original language | German (Austria) |
| Patent number | DE102006050881B3 |
| Publication status | Published - 10 Apr 2008 |
Fields of science
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- 202028 Microelectronics
- 202027 Mechatronics
- 202 Electrical Engineering, Electronics, Information Engineering
- 102005 Computer aided design (CAD)
- 202037 Signal processing
- 202023 Integrated circuits
- 202006 Computer hardware
JKU Focus areas
- Digital Transformation