TY - GEN
T1 - OCP2XI Bridge: an OCP to AXI Protocol Bridge
AU - Panjkov, Zdravko
AU - Haas, Jürgen
AU - Aigner, Martin
AU - Rosmanith, Herbert
AU - Liu, Tianlun
AU - Poppenreiter, Roland
AU - Wasserbauer, Andreas
AU - Hagelauer, Richard
PY - 2014/4
Y1 - 2014/4
N2 - The modern SOC design contains many IP cores with different communication
protocols. Improving the bridging and signal translation between
these protocols has become a critical factor for the performance of the whole
system. In this paper we will address the bridging of two well defined protocols,
the Advanced Extensible Interface (AXI) and the Open Core Protocol (OCP).
This bridge supports pipelined and multiplied transactions from both AXI and
OCP interface. In comparison to related work our bridge offers simpler implementation
and handling while containing full protocol functionality. The bridge
is implemented and verified in a modern SystemC regression environment with
large functional coverage. FPGA emulation is done on Versatile Express board
using the CPU board as a main emulation controller. The result shows that the
bridge is covering full protocol functionality and that maximal FPGA frequency
is acceptable for a wide range of applications.
AB - The modern SOC design contains many IP cores with different communication
protocols. Improving the bridging and signal translation between
these protocols has become a critical factor for the performance of the whole
system. In this paper we will address the bridging of two well defined protocols,
the Advanced Extensible Interface (AXI) and the Open Core Protocol (OCP).
This bridge supports pipelined and multiplied transactions from both AXI and
OCP interface. In comparison to related work our bridge offers simpler implementation
and handling while containing full protocol functionality. The bridge
is implemented and verified in a modern SystemC regression environment with
large functional coverage. FPGA emulation is done on Versatile Express board
using the CPU board as a main emulation controller. The result shows that the
bridge is covering full protocol functionality and that maximal FPGA frequency
is acceptable for a wide range of applications.
UR - https://www.scopus.com/pages/publications/84958536019
U2 - 10.1007/978-3-319-05960-0_16
DO - 10.1007/978-3-319-05960-0_16
M3 - Conference proceedings
SN - 9783319059594
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 179
EP - 190
BT - Reconfigurable Computing
PB - Springer Proceedings
ER -