Model Checking Dynamic and Hierarchical UML State Machines

Toni Jussila, J. Dubrovin, I. Porres, T. Latvala, T. Junttila

Research output: Chapter in Book/Report/Conference proceedingConference proceedingspeer-review

Abstract

This paper presents a technique to model check UML specifications by translating UML models to the model checker SPIN. Our models consist of active UML classes, whose behavior is defined by hierarchical state machines. The intended application is to find errors in protocols communicating using asynchronous message passing. Compared to previous efforts using a similar approach, our novel points are the following. First, we consider a subset of UML that in our opinion is expressive enough for protocol models but allows a simpler translation to SPIN than existing work. Preliminary analysis of simple industrial models support our conclusions on the expressivity of our UML subset. Second, we present a powerful action language that is still amenable to automatic analysis. The action language is used to specify the effects of transitions, which may include dynamic creation of new objects. Finally, we discuss an even simpler SPIN translation for flattened UML state machines and compare it to the translation that supports hierarchy.
Original languageEnglish
Title of host publicationProc. 3rd International Workshop on Model Development, Validation and Verification
Pages94-110
Number of pages17
Publication statusPublished - Oct 2006

Fields of science

  • 102 Computer Sciences
  • 102001 Artificial intelligence
  • 102011 Formal languages
  • 102022 Software development
  • 102031 Theoretical computer science
  • 603109 Logic
  • 202006 Computer hardware

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