Lightweight Symbolic Verification of Graph Transformation Systems with Off-the-Shelf Hardware Model Checkers

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Abstract

We present a novel symbolic bounded model checking approach to test reachability properties of model-driven software implementations. Given a concrete initial state of a software system, a type graph, and a set of graph transformations, which describe the system’s structure and its behavior, the system is tested against a reachability property that is expressed in terms of a graph constraint. Without any user intervention, our approach exploits state-of-the-art model checking technologies successfully used in hardware industry. The efficiency of our approach is demonstrated in two case studies.
Original languageGerman (Austria)
Title of host publicationTests and Proofs - Proc. of the 10th International Conference, TAP 2016, Held as Part of STAF 2016, Vienna, Austria, July 5-7, 2016
Editors Bernhard K. Aichernig, Carlo A. Furia
PublisherSpringer
Pages94-111
Number of pages18
Volume9762
DOIs
Publication statusPublished - 2016

Publication series

NameLecture Notes in Computer Science (LNCS)

Fields of science

  • 102 Computer Sciences
  • 102001 Artificial intelligence
  • 102011 Formal languages
  • 102022 Software development
  • 102031 Theoretical computer science
  • 603109 Logic
  • 202006 Computer hardware

JKU Focus areas

  • Computation in Informatics and Mathematics

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