Leveraging RISC-V for Flexible and Adaptive Real-Time Radar Sequencing

Frequency-Modulated Continuous-Wave (FMCW) radar is essential for accurate measurements of distance, velocity, and angle in applications such as autonomous vehicles and industrial sensing. In FMCW radar, ramp scenarios involve the gradual change of transmitted signal frequency over time, repeated in sequences to enable precise object detection and tracking. Central
to these systems is the sequencer, a specialized unit responsible for
generating and distributing control signals with precise timing to
synchronize hardware components during ramp generation. Traditional implementations, such as the Domain-Specific Sequencer (DSS), rely on custom Instruction Set Architectures (ISAs) optimized for radar operations but suffer from limitations in flexibility. This paper introduces the RISC-V Sequencer (RVS), a novel approach leveraging the modular and extensible RISC-V ISA to overcome these challenges. By extending a RISC-V processor with custom Control and Status Registers (CSRs) and providing a software library, the RVS enables high-level and adaptive ramp scenarios, offering a flexible and advanced alternative
to traditional radar sequencers such as DSS, which lack the adaptability required for real-time scenario changes.