Clausal Equivalence Sweeping

Armin Biere, Katalin Fazekas, Dr., Mathias Fleury, Nils Froleyks

Research output: Chapter in Book/Report/Conference proceedingConference proceedingspeer-review

Abstract

The state-of-the-art to combinational equivalence checking is based on SAT sweeping. It recursively establishes equivalence of internal nodes of two circuits to prove equivalence of their outputs. The approach follows the topological order from inputs to outputs and makes use of simulation to refine the set of potentially equivalent nodes to reduce the number of SAT solver queries. This non-uniform hybrid reasoning, using both the circuit structure and a clausal encoding, is complex to orchestrate. In earlier work, clausal encoding was avoided using a dedicated circuit-aware SAT solver. Instead, we propose to perform SAT sweeping directly on the clausal encoding of the complete equivalence checking problem within the SAT solver, but again relying on a second, dedicated, internal SAT solver. Both SAT solvers work on a clausal representation. This allows to transparently make use of all the advanced reasoning capabilities of the SAT solver, particularly pre- and inprocessing techniques. Index Terms—Equivalence Checking, SAT Sweeping, Miters, Equivalence Reasoning, Conjunctive Normal Form, Backbones.
Original languageEnglish
Title of host publicationPROCEEDINGS OF THE 24TH CONFERENCE ON FORMAL METHODS IN COMPUTER-AIDED DESIGN – FMCAD 2024
Editors Nina Narodytska, Philipp Rümmer
Place of PublicationWien
PublisherTU Wien Academic Press
Number of pages6
VolumeVolume 5
ISBN (Print)978-3-85448-065-5
Publication statusPublished - Oct 2024

Publication series

NameFormal Methods in Computer-Aided Design

Fields of science

  • 102 Computer Sciences
  • 102001 Artificial intelligence
  • 102011 Formal languages
  • 102022 Software development
  • 102031 Theoretical computer science
  • 603109 Logic
  • 202006 Computer hardware

Cite this