Abstract
Logical reversibility is the basis for emerging technologies like
quantum computing, may be used for certain aspects of low-power design,
and has been proven beneficial for the design of encoding/decoding
devices. Testing of circuits has been a major concern to verify the integrity
of the implementation of the circuit. In this paper, we propose
the main ideas of an ATPG method for detecting two missing gate faults.
To that effect, we propose a systematic flow using Binary Decision Diagrams
(BDDs). Initial experimental results demonstrate the efficacy
of the proposed algorithms in terms of scalability and coverage of all
testable faults.
| Original language | English |
|---|---|
| Title of host publication | Conference on Reversible Computation |
| Pages | 176-182 |
| Number of pages | 6 |
| Publication status | Published - 2017 |
Fields of science
- 102 Computer Sciences
- 202 Electrical Engineering, Electronics, Information Engineering
JKU Focus areas
- Computation in Informatics and Mathematics
- Mechatronics and Information Processing
- Nano-, Bio- and Polymer-Systems: From Structure to Function