TY - GEN
T1 - Analysis of Spurious Emission and In-Band Phase Noise of an All Digital Phase Locked Loop for RF Synthesis using a Frequency Discriminator
AU - Wicpalek, Christian
AU - Mayer, Thomas
AU - Maurer, Linus
AU - Vollenbruch, Ulrich
AU - Pittorino, Tindaro
AU - Springer, Andreas
PY - 2007
Y1 - 2007
N2 - In almost every wireless RF application, a Phase Locked Loop (PLL) is required. Digital signal processing especially for PLLs in CMOS technology is increasingly used instead of conventional analog processing to improve reliability, to reduce power consumption, and to allow for reconfigurability. This paper presents a simulative analysis of an All Digital PLL (ADPLL) with a two bit Frequency Discriminator (FD) in the feedback path. Effects on the in-band noise performance due to the sampling rate are treated. Furthermore, a theoretical prediction and simulative analysis of spurious emission offset frequencies will be given.
AB - In almost every wireless RF application, a Phase Locked Loop (PLL) is required. Digital signal processing especially for PLLs in CMOS technology is increasingly used instead of conventional analog processing to improve reliability, to reduce power consumption, and to allow for reconfigurability. This paper presents a simulative analysis of an All Digital PLL (ADPLL) with a two bit Frequency Discriminator (FD) in the feedback path. Effects on the in-band noise performance due to the sampling rate are treated. Furthermore, a theoretical prediction and simulative analysis of spurious emission offset frequencies will be given.
UR - https://www.scopus.com/pages/publications/34548828269
U2 - 10.1109/iscas.2007.378441
DO - 10.1109/iscas.2007.378441
M3 - Conference proceedings
SN - 1-4244-0921-7
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 3518
EP - 3521
BT - Proc. International Symposium on Circuits and Systems (ISCAS 2007)
ER -