Abstract
This paper presents the system-level design of a low-power continuous-time delta-sigma modulator (CT-DSM), demonstrates the circuit design of the input transconductor utilizing the SkyWater 130nm open-source PDK, and addresses circuit-level topologies for the remaining analog blocks. The CT-DSM is part of a dc-coupled data acquisition system for biosignals. This system aims to replace the conventional accoupled implementation comprised of a cascade of a pre-amplifier, antialiasing filter (AAF), and ADC. A CT loop filter was chosen over a discrete-time implementation due to the tight power budget (<15μW) and to avoid needing an AAF in front of the delta-sigma modulator. A Gm-C-based integrator is employed at the first stage due to the required input impedance (>100MΩ). High-level design exploration was performed by a custom framework, utilizing the python-deltasigma toolbox. The chosen sampling clock of 65536Hz limits the OSR to 256, which requires a fourth-order loop filter to reach the target SNR of 130dB. A system-level analysis highlights the feedforward topology as superior to its feedback counterpart regarding chip area and power consumption. Finally, the open-source circuit design is compared to state-of-art implementations.
Original language | English |
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Title of host publication | 2023 IEEE Nordic Circuits and Systems Conference (NorCAS 2023) |
Number of pages | 6 |
DOIs | |
Publication status | Published - Oct 2023 |
Fields of science
- 102 Computer Sciences
- 202 Electrical Engineering, Electronics, Information Engineering
JKU Focus areas
- Digital Transformation