Skip to main navigation Skip to search Skip to main content

A stochastic computing architecture for iterative estimation

Research output: Contribution to journalArticlepeer-review

Abstract

Stochastic computing (SC) is a promising candidate for fault-tolerant computing in digital circuits.We present a novel stochastic computing estimation architecture allowing to solve a large group of estimation problems including least squares estimation as well as sparse estimation. This allows utilizing the high fault tolerance of stochastic computing for implementing estimation algorithms. The presented architecture is based on the recently proposed linearized-Bregman-based sparse Kaczmarz algorithm. To realize this architecture, we develop a shrink function in stochastic computing and analytically describe its error probability. We compare the stochastic computing architecture to a fixed-point binary implementation and present bit-true simulation results as well as synthesis results demonstrating the feasibility of the proposed architecture for practical implementation.
Original languageEnglish
Article number8713530
Pages (from-to)580-584
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume67
Issue number3
DOIs
Publication statusPublished - Mar 2020

Fields of science

  • 202038 Telecommunications
  • 202030 Communication engineering
  • 202037 Signal processing

JKU Focus areas

  • Digital Transformation

Cite this