Abstract
In this paper we discuss how assertions can be applied for the design and verification of mixed-signal virtual prototypes based on SystemC/AMS [1][2]. In particular, we propose a SystemC assertions library with a user-friendly API which enables specification of complex mixed-signal behaviors. We show that the assertions library is designed to handle heterogeneous systems containing mixed-signal characteristics, transactions, and software. Furthermore, we explain how assertions can be easily and intuitively used to specify the DUV behavior across multiple domains. Using ARM Fast Models-based temperature control system we show how our proposed SystemC assertions library can be used to verify the DUV.
| Original language | English |
|---|---|
| Title of host publication | Design and Verification Conference and Exhibition Europe 2022 |
| Number of pages | 8 |
| Publication status | Published - Dec 2022 |
Fields of science
- 202005 Computer architecture
- 202017 Embedded systems
- 102 Computer Sciences
- 102005 Computer aided design (CAD)
- 102011 Formal languages
JKU Focus areas
- Digital Transformation