Abstract
We present a novel, simple concept to generate a
robust voltage reference, which is based on capacitive bias of pnjunctions.
The respective PTAT and CTAT signals are sampled
from the voltage-decay by means of different timings, and
combined through charge sharing. This provides for precise
current ratios of N >10000, resulting in exceptionally large PTAT
and reverse-bandgap levels. Here, for the first time, the
Nwell/Psub diode of a standard CMOS process is utilized in
replacement of parasitic BJTs. The measured samples, in 16nm
FinFet on 2200μm² active area, achieve an untrimmed accuracy of
±0.82% (3σ) at 235mV output. Line sensitivity is 0.7mV/100mV,
operating at a minimum supply of 0.85V with 47nA power drain.
The compact Bandgap circuit is digital to that effect that no
amplifiers, resistors, biasing or matching currents are required,
neither is it impacted by any analog transistor performance
| Original language | English |
|---|---|
| Title of host publication | Asian Solid State Circuits Conference (A-SSCC) |
| Number of pages | 4 |
| Publication status | Published - 2018 |
Fields of science
- 102 Computer Sciences
- 202 Electrical Engineering, Electronics, Information Engineering
JKU Focus areas
- Mechatronics and Information Processing
- Nano-, Bio- and Polymer-Systems: From Structure to Function