Project Details
Description
VHDL Development of a digital USB Interface Module for ASIC integration; prototype manufacturing in 0.35?m CMOS technology.
| Status | Finished |
|---|---|
| Effective start/end date | 01.01.2000 → 30.06.2000 |
Collaborative partners
- Johannes Kepler University Linz (lead)
- AMS (Project partner)
Fields of science
- 202024 Laser technology
- 202023 Integrated circuits
- 202018 Semiconductor electronics
- 202028 Microelectronics
- 202027 Mechatronics
- 202 Electrical Engineering, Electronics, Information Engineering
- 102005 Computer aided design (CAD)
- 202037 Signal processing
- 202006 Computer hardware
JKU Focus areas
- Digital Transformation