Project Details
Description
The image preprocessing unit of a realtime 3D visualization will be reallized in 3 in series connected Xilinx Virtex FPGAs (XCV300).This unit defines a constant thoughput of 60 MWord per secound and will be designed for medical utlraconic devices. The functionality requires extensive application of digital filters (exertion of FIR and IIR filters), mathematical calculations and communication with external memory chips (SRAM, ZBT-RAM, SDRAM) and microprocessors.The design description is programmed in VHDL and converted by synthesis
and placement & routing to an integrated circuit compliant netlist.
Status | Finished |
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Effective start/end date | 15.04.1999 → 15.02.2000 |
Collaborative partners
- Johannes Kepler University Linz (lead)
- Kretztechnik AG (Project partner)
Fields of science
- 202037 Signal processing
- 202023 Integrated circuits
- 202028 Microelectronics
- 202027 Mechatronics
- 202018 Semiconductor electronics
- 202 Electrical Engineering, Electronics, Information Engineering
- 102005 Computer aided design (CAD)
- 202006 Computer hardware
JKU Focus areas
- Digital Transformation