Research output per year
Research output per year
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Analog Circuit Design
Pretl, H., Köfinger, M. & Dorrer, S., 31 Jan 2025Research output: Non-textual form › Digital or Visual Products
Open Access -
Radio-Frequency Integrated Circuits
Pretl, H., 2025Research output: Non-textual form › Digital or Visual Products
Open Access -
Fifty Nifty Variations of Two-Transistor Circuits: A tribute to the versatility of MOSFETs
Pretl, H. & Eberlein, M., Aug 2021, In: IEEE Solid-State Circuits Magazine. 13, 3, p. 38 - 46 9 p.Research output: Contribution to journal › Article
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IIC-OSIC-TOOLS
Pretl, H. (Developer) & Zachl, G. (Developer), 2024Research output: Non-textual form › Software
Open Access -
A 494-nW 32768-Hz DCXO-Based Clock Generator with 613 ps Jitter for Biomedical Signal Acquisition
Fath, P. & Pretl, H., Mar 2026, 2026 IEEE 17th Latin American Symposium on Circuits and Systems, LASCAS 2026 - Proceedings. 1 ed. Institute of Electrical and Electronics Engineers Inc., (2026 IEEE 17th Latin American Symposium on Circuits and Systems, LASCAS 2026 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference proceedings › peer-review
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AI-Driven Hierarchical Optimization Framework
Pretl, H. (Researcher)
15.06.2026 → 31.05.2030
Project: Contract research › Industry project
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ODE4EC-AMS: Open Design Environment for European Chips - Analogue and Mixed Signal_2
Pretl, H. (PI)
01.06.2026 → 31.05.2029
Project: Funded research › EU - European Union
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Sub-blocks generators for NSSAR ADC
Pretl, H. (Researcher)
01.04.2025 → 31.03.2029
Project: Contract research › Industry project
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JKU LIT - SAL Intelligent Wireless Systems Lab (IWS Lab)
Baumgartner, S. (Researcher), Feger, R. (Researcher), Heining, S. (Researcher), Hochreiter, S. (Researcher), Khanzadeh, R. (Researcher), Mitta, R. (Researcher), Moser, B. (Researcher), Pretl, H. (Researcher), Springer, A. (Researcher), Stelzer, A. (Researcher), Zachl, G. (Researcher) & Huemer, M. (PI)
01.01.2024 → 31.12.2026
Project: Other › Other project
Activities
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KLayout Productivity Suite: Boosting Efficiency in Manual IC Layout Design
Köhler, M. (Speaker), Pretl, H. (Contributor) & Fath, P. (Contributor)
08 Jul 2026Activity: Talk or presentation › Invited talk › science-to-public
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A Fully-Programmatic Layout Generation & Verification Flow for IHP Open-PDK PCells and RF-Structures utilizing GDSFactory & AWS Palace
Kellerer-Pirklbauer, D. (Speaker), Dorrer, S. (Contributor) & Pretl, H. (Contributor)
08 Jul 2026Activity: Talk or presentation › Contributed talk › science-to-science
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Towards a practical open-source RF-SoC design flow: lessons from a 40-GHz tapeout in IHP SG13G2
Fath, P. (Speaker), Pretl, H. (Contributor) & Köhler, M. (Contributor)
07 Jul 2026Activity: Talk or presentation › Invited talk › science-to-science
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From Idea to Tapeout: An Open-Source Analog Mixed-Signal Design Flow with the IHP Open-PDK
Dorrer, S. (Speaker) & Pretl, H. (Contributor)
07 Jul 2026Activity: Talk or presentation › Contributed talk › science-to-science
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The Open Source IC Design Landscape
Pretl, H. (Speaker)
19 May 2026Activity: Talk or presentation › Other talk or presentation › science-to-science