Verification of Embedded Binaries using Coverage-guided Fuzzing with SystemC-based Virtual Prototypes

Description

With the decline of Moore’s Law, several post-CMOS technologies are currently under heavy consideration. Promising candidates can be found in the class of Field-coupled Nanocomputing (FCN) devices as they allow for highest processing performance with tremendously low energy dissipation. With upcoming design automation in this domain, the need for formal verification approaches arises. Unfortunately, FCN circuits come with certain domain-specific properties that render conventional methods for the verification non-applicable. In this paper, we investigate this issue and propose a verification approach for FCN circuits that addresses this problem. For the first time, this provides researchers and engineers with an automatic method that allows them to check whether an obtained FCN circuit design indeed implements the given/desired function. A prototype implementation demonstrates the applicability of the proposed approach.

Period	10 Sept 2020
Event title	ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020
Event type	Conference
Location	Beijing, ChinaShow on map