Unlocking the Hidden Potential of Your Waveforms via Programmable Analysis

Description

This keynote addresses one of the most important challenges in the design of current and future circuits and systems: understanding and analyzing the wavesforms generated by the HDL simulator. Today, waveform analysis is a highly manual process performed in waveform viewers. In this presentation, we will show how to bring automation to waveform analysis using the open source Waveform Analysis Language (WAL). With WAL, the designer, verification engineer, or researcher can code their analysis tasks in the form of programs that run on waveforms. Such a program can, for example, determine bus latency for a given workload, compute the IPC of a processor running an application, create a graph of software basic blocks for software running on a processor, identify gates that do not toggle during simulation, and much more. We introduce the core concepts of WAL and show practical examples, including RISC-V case studies.

Period	06 Jun 2024
Event title	Microelectronic Systems Symposium (MESS)
Event type	Conference
Location	AustriaShow on map