How we learned to stop worrying and build a RISC-V VP with only one microcode instruction

  • Lucas Klemmer (Speaker)
  • Sonja Gurtner (Speaker)
  • Große, D. (Speaker)

Activity: Talk or presentation › Contributed talk › science-to-science

Description

In this extended abstract, summarizing[1]and[2], we present Goldcrest-VP a Virtual Prototype (VP) which serves as an exploration platform for microcoded RISC-V cores leveraging the One Instruction Set Computer (OISC) principle. Furthermore, we introduce a formal verification framework for the microcode procedures. Using Goldcrest-VP, we developed SUBLEQ microcode that is fully RISC-VRV32I compliant. We were able to uncover several bugs in the microcode using our formal verification framework.
Period24 Mar 2023
Event titleITG/GI/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) 2023
Event typeConference
LocationFreiburg, GermanyShow on map

Fields of science

  • 202017 Embedded systems
  • 202005 Computer architecture
  • 102005 Computer aided design (CAD)
  • 102 Computer Sciences
  • 102011 Formal languages

JKU Focus areas

  • Digital Transformation

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