Efficient Hardware Architecture for Random Forest Training

Description

Efficient machine learning implementations for resource-constrained edge devices are currently an active research topic. For such edge devices, pure software solutions are often infeasible for real-time use, and thus hardware-based accelerators have to be employed. Random Forests, which are ensembles of decision trees, can be implemented using particularly few hardware resources while still achieving competitive prediction results in certain applications. Recent work on inference shows the promise of these approaches for static problems. For dynamic problems, online methods for learning from new data must be considered, allowing to (re-)train models on edge devices. In this work, we propose an efficient hardware implementation for training a Random Forest fully in digital hardware, serving as a fast, embedded method implementable in low-end FPGAs, and provide insights about performance and resource metrics depending on different levels of quantization.

Period	28 Feb 2024
Event title	19th International Conference on Computer Aided Systems Theory (EUROCAST 2024)
Event type	Conference
Location	SpainShow on map