Did we Test Enough? Functional Coverage for Post-Silicon Validation

Description

The ever increasing complexity of modern systems remains a challenge for semiconductor companies. Once a new chip has been produced, it has to be ensured that it works properly. To this end, sophisticated test environments and test programs are applied. However, to ensure that the applied test program indeed fully covers all important details of the produced chip remains a big challenge. In this work, we propose a methodology which supports the designer by analyzing the coverage of a given test program. To this end, we utilize accomplishments from coverage analysis for functional verification at other abstraction levels. A discussion of the resulting application scenario eventually shows that this allows for an efficient coverage analysis for test programs with basically no changes in the work-flows of test program developers.

Period	04 Sept 2019
Event title	International Test Conference in Asia (ITC-Asia)
Event type	Conference
Location	JapanShow on map