An Open-Source 1.44-MS/s 703-µW 12-bit Non-Binary SAR-ADC Using 448-aF Capacitors in 130-nm CMOS

Description

This paper presents the design of a self-clocked 12-bit non-binary fully differential SAR-ADC using the SKY130 open-source PDK. The entire mixed-signal circuit design and layout were created with free and open-source software. The ADC reaches a sample rate of up to 1.44MS/s at 1.8V supply while consuming 703µW of power on a small 0.175mm² area. A configurable decimation filter can increase the ADC resolution up to 16 bits while using an oversampling factor of 256. A 9-bit thermometer-coded and 3-bit binary-coded DAC matrix using a 448aF waffle-capacitor results in a total capacitance of 1.83pF per input. Realizations of configurable analog functions using the form factor of SKY130 high-density standard cells allow the parametrization of an analog circuit in a hardware description language and hardening of the macro in an intentionally digital workflow.

Period	21 Sept 2023
Event title	31st Austrian Workshop on Microelectronics (Austrochip 2023)
Event type	Conference
Location	AustriaShow on map