Synchronization of Clocked Field-Coupled Circuits

Frank Sill Torres; Marcel Walter; Robert Wille; Daniel Große; Rolf Drechsler

Synchronization of Clocked Field-Coupled Circuits

Frank Sill Torres
, Marcel Walter
, Robert Wille
, Daniel Große
, Rolf Drechsler

Abteilung für Quantum Computing

Publikation: Beitrag in Buch/Bericht/Konferenzband › Konferenzbeitrag › Begutachtung

Abstract

Proper synchronization in clocked Field-Coupled Nanocomputing (FCN) circuits is a fundamental problem. In this work, we show for the first time that global synchronicity is not a mandatory requirement in clocked FCN designs and discuss the considerable restrictions that global synchronicity presents for sequential and large-scale designs. Furthermore, we propose a solution that circumvents design restrictions due to synchronization requirements and present a novel RS-latch.

Originalsprache	Englisch
Titel	IEEE International Conference on Nanotechnology (IEEE Nano)
Seitenumfang	4
Publikationsstatus	Veröffentlicht - 2018

Wissenschaftszweige

102 Informatik
202 Elektrotechnik, Elektronik, Informationstechnik

JKU-Schwerpunkte

Computation in Informatics and Mathematics
Mechatronics and Information Processing
Nano-, Bio- and Polymer-Systems: From Structure to Function

Dieses zitieren

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abstract = "Proper synchronization in clocked Field-Coupled Nanocomputing (FCN) circuits is a fundamental problem. In this work, we show for the first time that global synchronicity is not a mandatory requirement in clocked FCN designs and discuss the considerable restrictions that global synchronicity presents for sequential and large-scale designs. Furthermore, we propose a solution that circumvents design restrictions due to synchronization requirements and present a novel RS-latch.",

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AB - Proper synchronization in clocked Field-Coupled Nanocomputing (FCN) circuits is a fundamental problem. In this work, we show for the first time that global synchronicity is not a mandatory requirement in clocked FCN designs and discuss the considerable restrictions that global synchronicity presents for sequential and large-scale designs. Furthermore, we propose a solution that circumvents design restrictions due to synchronization requirements and present a novel RS-latch.

M3 - Conference proceedings

BT - IEEE International Conference on Nanotechnology (IEEE Nano)

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